Experience in block level and full-chip floorplan and implementation. Understanding physical and electrical aspects of the technology Experience in configuring and running physical verification runsets (Calibre/ICV) on block level and on full-chip

.Practical Engineer/B.tech/BSc in Electrical or computer engineering .Experience with layout editor tools: Virtuoso – Must. CDesigner, laker, genesis – Advantage .Experience with at least one of those layout verification tools: Calibre, Hercules,