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Senior SoC Architect
Description
Senior SoC Architect to join the Architecture Team of our Network and Compute Division, to define the architecture of the company’s next generation enterprise SoC Products.
Activities and Responsibilities
Definition of an overall product architecture that answers a desired Marketing & Product Requirements. Show a Tradeoff analysis for architecture decisi
Definition of multi-communication system flows such as boot, reset, power management, offload paths etc
Definition of the Top Level architecture of the solution
Write architectural spec and Product Functional description; Work closely with Technical Writer
Drive overall Performance, power and competitive matrixes definition with proper cost, schedule and effort tradeoffs
Perfect architecture assimilation between HW and SW
Qualifications
B.SC. in Electrical-Engineering
10 years of relevant experience
Hands-on experience in defining and in developing system on a chip products
Grounds up knowledge in networking
Vast experience with ARM based SoC architecture
Previous experience and deep understanding in one, or more, of the following domains
Home, SoHo and Enterprise networking products (GWs, routers, network and storage appliances etc)
WLAN Access Points
Familiar with SoC peripheral interfaces protocols and theory of operation – PCIe, USB, SATA, Flashes, DDR etc
**Travel is required
Senior VLSI Design Engineer
„Taking part in the architecture and implementation of complex Satellite MAC layer, Networking and SoC IPs
„Working closely with architecture team developing together high end DSP and Networking IPs
Responsible for the correctness and timing closure of the IP
Job Requirements
BSc in Computer science/ Electrical engineering from a known University with grade average greater than 85
Strong background in signal processing and/or communications protocols – Must
AT least 5 years experience as VLSI Design Eng with Verilog- Must
Experience with synthesis and STA -Advantage
Design & Integration Engineer
In this visible role, you will be responsible to take part in the SoC VLSI design cycle from early definition through back-end implementation stage
Core Responsibilities
Your responsibilities in this role are likely to include:
Micro-architecture definitions at the unit level
RTL coding, block level simulations and synthesis
Work closely with verification team on block/top level to ensure timely delivery of quality designs
The ideal candidate will have
At least 3 years of hands on experience in VLSI Design
Must have strong Verilog / System Verliog skills
(Familiar with the various backend tools (synthesis and STA
(Familiar with advanced design practices (Clock/Voltage domain crossing, DFT and Low Power Design
Education
BS/MS in EE/CE from lead universities
